It might sound insignificant, but saving power one fan at a time can really add up. This design example shows how digital brushless DC fan control is implemented with an integrated Programmable System-on-Chip (PSoC).
As more industrial and consumer products shrink in size, the
need to remove heat in an efficient, quiet way is becoming increasingly
important. A PSoC produces an efficient, cost-effective means for accomplishing
this.
Basics of fan operation
Peripherals needed
This fan is required to operate from 600 rpm to 30,000 rpm,
well within the capacity of a microcontroller assisted by analog and digital
peripherals and an ideal application for a microcontroller-based PSoC. The
following peripherals are required:
• A
comparator to convert the Hall sensor’s differential analog outputs into a
digital signal.
• An
8-bit PWM to control the magnitude of the coil current. To control the
current’s direction, the microcontroller switches the PWM into the appropriate
lower leg of the Field-Effect Transistor (FET) bridge. The PWM output frequency
is set to 23.4 kHz (6 MHz/256), just above the human audio range.
• A
16-bit timer to measure the edges from the Hall sensor comparator. This timer
will measure the time for all four phases of the motor because the four poles
are not perfectly spaced. The timing for each pole is needed because driving
the coil for the very last bit of each cycle does not produce any significant
power while consuming a significant amount of current. To conserve power, the
PWM is stopped some empirically determined amount of time before the end of the
cycle. The PWM uses the previous known phase time to turn itself off early.
• An ADC to measure the shunt current and thermistor voltages.
• A 16-bit timer to
measure the duty cycle to the incoming speed selection control signal. The
timer is clocked at 24 MHz. The timer is set to measure the time for a falling
edge, the next raising edge, and the next falling edge. The duty cycle is shown
in the equation:
Note that clock accuracy falls out of the equation. For
example, a 24 MHz timer clocking a 25 kHz input has a period of 960 with
accuracy much less than 0.2 percent.
The Cypress CY8C21323-24LFXI PSoC that controls this design
comes in a 24-pin micro lead frame package, contains a microcontroller, and has
the following peripherals:
• Four
8-bit digital blocks that can be configured as timers, counters, and PWMs and
can be cascaded to make wider peripherals.
• Two
analog blocks that can be used as single-ended programmable comparators.
Combining one with a properly configured digital block produces a 10-bit ADC.
Both of these blocks can be combined into a comparator with differential
inputs.
States to share
At first glance, it appears that there are not enough
peripherals to construct the required system elements. As Figure 2 shows, if
the control is segmented into eight different states, many of the required
elements can share the available system resources.
Timing is broken down into two rotations, with each rotation
having four phases. The PWM is needed for all eight phases, so it cannot be
shared and thus requires a single digital block. Each phase starts with the
transition on the Hall sensor, which comprises two analog blocks. At this
point, all the FETs are turned off and the appropriate high-side FET is turned
on. The PWM is connected to the appropriate low-side FET and turned on. The PWM
uses the previously calculated speed to determine when to turn itself off.
From just before the end of Odd3 to just after the
start of Odd0, two of the digital blocks are configured to make a
16-bit timer and measure the four even phase widths. This information is used
to calculate the fan speed. Note that the speed is not measured for odd
rotations.
In the middle of Odd0, one analog block and one
digital block are reconfigured to build an ADC and measure the shunt current.
After finishing, the analog blocks are reconfigured to rebuild the Hall
comparator. The same is done in Odd1 to measure the thermistor
voltage. In Odd3, two digital blocks are reconfigured to measure the
incoming PWM’s duty cycle. When finished, they are reconfigured to measure fan
speed, and the cycle repeats.
With this configuration, only three of the digital blocks are
used. The fourth is available for additional free features.
As demonstrated by this design example, a PSoC allows for
reduced components and performance improvements in a brushless DC motor. This
type of dynamic reconfiguration enables designers to share system resources as
well as reduce system costs.
Dave Van Ess is a
principal applications engineer and member of the technical staff at Cypress
Semiconductor, based in San Jose, California. He has 30 years of experience
designing microcontroller-based hardware, software, and analog systems and
holds eight patents for medical systems, signal processing design, and PSoC
digital block enhancements. Dave graduated with a BSEE from the University of
California, Berkeley in 1977.
Cypress Semiconductor
408-943-2600
dwv@cypress.com
www.cypress.com



