Tightly Integrated Quartz DRC and Talus RTL-to-GDSII Solution Automates GLOBALFOUNDRIES’ DFM Flow
Innovative Technology Solutions for Emerging Silicon Challenges to be Presented
Qualification gives designers added confidence in using QCP to address IC complexities implemented in TSMC’s 28-nm processes
Titan Shape-Based Router for Mixed-Signal Designs Reduces Routing Time From 2 Weeks to 2 Days
Icera Adopts Talus 1.2 Platform With Advanced OCV and Clock Gating Capabilities for Improved Area Efficiency and Low Power Consumption
Engineers Can Implement 1 to 1.5 Million Cells Per Day With AOCV, MMMC and Crosstalk Avoidance Capabilities Enabled
Another Strong Performance
Integrated RTL-to-GDSII Platform and Fast, Accurate Circuit Simulation Tool Reduce Time to Market and Cost
FineSim’s Multi-CPU, Fast-SPICE and SPICE Simulation Technology Allows Intelligent Tradeoffs Between Speed and Accuracy, Increasing Designer Productivity
Predictable, Repeatable, Customizable Flow Speeds Prototyping, Enables Optimal Power/Performance Tradeoff
